A recent rumor claimed that AMD could have Ryzen 5000 XT processors in the pipeline – somewhat faster variants of existing models – but it seems this isn’t the case after all.
This came from well-known leaker Patrick Schur who tweeted about spotting a B2 revision of Ryzen 5000 chips, speculating that this could be juiced-up XT refreshes of some CPUs – after all, AMD did this with Ryzen 3000 models.
However, AMD has reportedly said that while this revision process is indeed underway, it’s all about enabling greater manufacturing capacity for Ryzen 5000 CPUs, rather than any refresh that brings faster clock speeds.
According to the statement made by AMD to Polish tech site Benchmark.pl (flagged up by PC Gamer), Team Red asserts that: “As part of our continued effort to expand our manufacturing and logistics capabilities, AMD will gradually rollover AMD Ryzen 5000 Series Desktop Processors to B2 Revision over the next six months. It does not bring functionality or performance improvements, and no BIOS update is required.”
Note that this statement is translated from Polish, and we have to take it on trust that it comes from a genuine AMD source – so sprinkle some condiments around liberally – but the XT rumor was always a bit of a leap in the dark itself, anyway.
XT ammo?
That said, XT chips could still be coming further down the line – who knows. Particularly if AMD feels the need to fire some silicon ammunition back at Intel’s Rocket Lake chips, and Ryzen 6000 processors aren’t coming this year as rumored, and won’t debut until 2022 (which would mean Intel’s next-gen Alder Lake CPUs could emerge unchallenged, of course).
If this is true, the good news is that stock issues around some of the harder to find AMD Zen 3-based processors – like the higher-end Ryzen 9 5900X and the midrange powerhouse Ryzen 5 5600X – could ease considerably in the near-ish future. That would obviously be a very welcome prospect.
Furthermore, these B2 Revision chips will work without the need for any firmware update, as mentioned in the AMD statement.